Anti-interference Methods in PCB Circuit

Anti-interference Methods in PCB Circuit

The methods of anti interference in PCB circuit have close relationship with the designs of specific circuit. Here are some common anti-interference methods in PCB design:

PCB Circuit

Power line Design

According to the size of the electric current on printed circuit board, designers should try to expand the width of power line, with the aim of reduce loop resistance. At the same time, the power line and the ground should be placed in the same direction of data transmission, to enhance noise immunity.

Ground Design

(1) Digital ground and analog ground should be separated. If both the logic circuit and linear circuit will be placed on the circuit board, they should be separated. Low frequency circuit ground should apply single point in parallel grounding, and it also can apply partial series and then parallel grounding if there are some difficulties in actual wiring. High-frequency circuits should adopt multi-point series grounded with short ground. And high-frequency components are surrounded by grid-like large foil.

(2) Ground should be bold. Some grounds will be influenced by the changes of current, reducing the anti-noise performance. Therefore, the ground should be bold to allow time times default current to pass. If possible, the ground wire should be more than 2 ~ 3mm.

(3) To make ground form closed loop. PCB formed by digital circuits will have good performance in anti-noise with the help of closed loop.

Decoupling Capacitor Configuration

One conventional approach in PCB design is to configure the appropriate decoupling capacitors in key parts of the PCB.

Some common decoupling capacitors configuration as below:

(1) Connect power input with 10 ~ 100uf the electrolytic capacitor. If possible, it will be much better with more than 100uF.

(2) Generally, each integrated circuit chip should be arranged in a 0.01pF ceramic capacitor. But when PCB gap is not enough, it is acceptable that every 4 to 8 chips are arranged with a 1 ~ 10pF capacitor.

(3) For the components with weak anti-noise ability, such as RAM, ROM memory device, it is better to connect decoupling capacitors between the chip power line and ground.

(4) Capacitor lead cannot be too long, especially the high-frequency capacitor cannot have a lead.